000 01005nam a2200229 a 4500
008 120704r20072003maua b 001 0 eng d
010 _a2009044515
020 _a9788120327566
040 _aDLC
_cDLC
_dDLC
_dBD-KhUET
082 0 0 _a621.395
_222
100 1 _aCiletti, Michael D.
245 1 0 _aAdvanced digital design with the Verilog HDL /
_cMichael D. Ciletti.
260 _aBoston :
_bPrentice Hall ;
_aNew Delhi :
_bPHI Learning,
_cc2003.[Reprinted 2009]
300 _axxi, 982 p. :
_bill. ;
_c24 cm.
490 0 _aPrentice Hall Xilinx design series
504 _aIncludes bibliographical references and indexes.
650 0 _aLogic design
_xData processing.
650 0 _aVerilog (Computer hardware description language)
999 _c5988
_d5988
952 _w2012-07-04
_p3010043426
_r2013-01-31
_40
_eKarim international
_00
_bKUETCL
_m5
_10
_o621.395 CIL
_d2010-06-29
_q2013-08-31
_t1
_70
_cGEN
_2ddc
_yBK
_s2013-01-31
_l1
_aKUETCL